Fazendo sentido das barreiras à memória
Estou tentando entender as barreiras de memória em um nível útil para programadores sem bloqueio de java.Este nível, eu sinto, está entre aprender apenas sobre voláteis e aprender sobre o trabalho de buffers de armazenamento / carga em um manual x8
Passei algum tempo lendo vários blogs / livros de receitas e criei o resumo abaixo. Alguém mais experiente poderia olhar o resumo para ver se perdi ou listei algo incorretament
LFENCE:
Name : LFENCE/Load Barrier/Acquire Fence
Barriers : LoadLoad + LoadStore
Details : Given sequence {Load1, LFENCE, Load2, Store1}, the
barrier ensures that Load1 can't be moved south and
Load2 and Store1 can't be moved north of the
barrier.
Note that Load2 and Store1 can still be reordered.
Buffer Effect : Causes the contents of the LoadBuffer
(pending loads) to be processed for that CPU.This
makes program state exposed from other CPUs visible
to this CPU before Load2 and Store1 are executed.
Cost on x86 : Either very cheap or a no-op.
Java instructions: Reading a volatile variable, Unsafe.loadFence()
SFENCE
Name : SFENCE/Store Barrier/Release Fence
Barriers : StoreStore + LoadStore
Details : Given sequence {Load1, Store1, SFENCE, Store2,Load2}
the barrier ensures that Load1 and Store1 can't be
moved south and Store2 can't be moved north of the
barrier.
Note that Load1 and Store1 can still be reordered AND
Load2 can be moved north of the barrier.
Buffer Effect : Causes the contents of the StoreBuffer flushed to
cache for the CPU on which it is issued.
This will make program state visible to other CPUs
before Store2 and Load1 are executed.
Cost on x86 : Either very cheap or a no-op.
Java instructions: lazySet(), Unsafe.storeFence(), Unsafe.putOrdered*()
MFENCE
Name : MFENCE/Full Barrier/Fence
Barriers : StoreLoad
Details : Obtains the effects of the other three barrier.
Given sequence {Load1, Store1, MFENCE, Store2,Load2},
the barrier ensures that Load1 and Store1 can't be
moved south and Store2 and Load2 can't be moved north
of the barrier.
Note that Load1 and Store1 can still be reordered AND
Store2 and Load2 can still be reordered.
Buffer Effect : Causes the contents of the LoadBuffer (pending loads)
to be processed for that CPU.
AND
Causes the contents of the StoreBuffer flushed to
cache for the CPU on which it is issued.
Cost on x86 : The most expensive kind.
Java instructions: Writing to a volatile, Unsafe.fullFence(), Locks
Finalmente, se SFENCE e MFENCE drenam o storeBuffer (invalida o cacheline e aguarda a ativação de outros cpus), por que um é um no-op e o outro é um muito car
Obrigad
(Publicação cruzada do fórum de simpatia mecânica do Google)